View UBA3077HN_5005885.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

UBA3077HN
Three-channel switched-mode LED driver
Rev. 1 -- 8 February 2011 Objective data sheet
1. General description
The UBA3077HN is a high efficiency LED driver in an HVQFN40 package for general LED lighting or backlighting LCD displays. Operating from a supply of 10 V to 42 V, it can drive up to 3 strings of 20 LEDs each. The low voltage circuitry is powered by an external 5 V voltage supply. The chip can operate autonomously or be controlled via a 400 kHz I2C-bus. The peak current in each string is fixed by an external resistor. Three independent Pulse-Width Modulated (PWM) signals are available for dimming purposes. These PWM signals are delivered either directly by the graphic processor (direct control mode) to the pins PWM1, PWM2 and PWM3, or generated on-board based on data sent via the I2C-bus interface. Each LED string is supplied by its own boost converter delivering an output voltage from VIN up to 75 V. The switching frequency is 500 kHz. A power saving mode is entered when all PWM signals stay LOW for a period longer than 1 s. Several protection mechanisms are available: overvoltage, short-circuit and open LED, overcurrent, UnderVoltage LockOut (UVLO) and overtemperature with an advanced adaptive protection. An error self-recovery (hiccup) mechanism is available with programmable delay time via an external capacitor.
2. Features and benefits
Three-channel LED backlight driver 2 % absolute LED current accuracy and channel-to-channel matching External power supply voltage from 10 V to 42 V and 5 V for low voltage circuitry Constant 500 kHz frequency peak current mode control Low value output capacitor (2 F) Up to 150 mA per channel Peak LED current programmable with external resistor Three boost converters from VIN up to 75 V output voltage High efficiency up to 90 % 14-bit PWM dimming (either defined by system-generated PWMs, or internally generated) from 2.0 kHz to 24 kHz (duty cycle from 0.1 % to 100 %) All power FETs integrated
Accurate internal oscillator
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver Dedicated reference voltage input for host interface signals
Possible control by I2C-bus with 2-bit address plus a common address for simultaneous configuration of several devices OverVoltage Protection (OVP) Adaptive thermal protection Power-On-Reset (POR) Open LED detection LX slope limited at 4 V/ns Hiccup delay programmable via an external capacitor
2.5 A coil current limitation UVLO Short-circuit protection OverCurrent Protection (OCP) if external resistor value is wrong Programmable LED current rise time limitation (250 ns or 500 ns) Automatic low-power mode switching if PWM LOW period is too long
3. Applications
General LED lighting Display LED backlight for TV/computing applications: Content Active Backlight Control (CABC)
4. Quick reference data
Table 1. Quick reference data VDD(24V) = 24 V; VDD(5V) = 5 V; VDD(IO) = 5 V; Tamb = 0 C to 80 C, unless otherwise specified. Symbol VDD(24V) VDD(5V) VDD(IO) IDD(24V) IDD(5V) Parameter supply voltage (24 V) supply voltage (5 V) supply current (24 V) supply current (5 V) Sleep mode; internal CCO on Conditions pin VIN pin VDD with IDD < 35 mA Min 10 4.5 1.62 Active mode; internal CCO on; 150 mA ILED; 100 % PWM duty cycle; all 3 channels active IDD(IO) Vref(IREF) VO VFB ILED input/output supply current reference voltage on pin IREF output voltage voltage on pin FB LED current 24 kHz PWM pin IREF pins VOUT1, VOUT2 and VOUT3 PWM on; static with 100 % PWM duty cycle pin FB; RIREF = 2667 ; RIREF accuracy = 0.1 %; PWMn = HIGH internal PWM generator; external PWM signal 0.98 VDD(24V) 147 Typ 24 5 100 2 21 Max 42 5.5 5.5 2.8 Unit V V V A mA mA
input/output supply voltage pin VDD(IO) with IDD(IO) < 1 mA
1.00 0.9 150
100 1.02 75 1.2 153
A V V V mA
tw(PWM)H RDSon
HIGH level PWM pulse width drain-source on-state resistance
417 -
0.5
1
ns
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
2 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Table 1. Quick reference data VDD(24V) = 24 V; VDD(5V) = 5 V; VDD(IO) = 5 V; Tamb = 0 C to 80 C, unless otherwise specified. Symbol fsw max Vth(ovp) Tamb Tth(otp) Parameter switching frequency maximum duty cycle overvoltage protection threshold voltage ambient temperature Conditions DC-to-DC DC-to-DC pins VOUT1, VOUT2, VOUT3 operating Min 400 75 0 Typ 500 77 150 Max 600 80 85 80 Unit kHz % V C C
overtemperature protection die junction temperature threshold temperature
5. Ordering information
Table 2. Ordering information Package Name UBA3077HN HVQFN40 Description plastic thermal enhanced very thin quad flat package; no leads; 40 terminals; body 6 x 6 x 0.85 mm Version SOT618-1 Type number
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
3 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
6. Block diagram
VIN 19
VDD
Ipeak_th
BANDGAP REFERENCE VDD 18
UVLO
SHORT/OPEN LED
POR CLK (500 kHz) VDD PWM channel 1 9 LX1 DIGITAL BOOST CONTROLLER
11 PGND11 HICCUP 36 12 VOUT1
INT 6
FAULT MANAGEMENT
ADC
VDD OCP SDA 21 SCL 22 l2C-BUS INTERFACE 32 MHz CLOCK AND MODE MANAGEMENT VSYNC 4 PWM GENERATOR CH1 LEVEL SHIFTER PWM CH2 CTRL CH3 PWM channel 1 PWM channel 2 PWM channel 3 +1 V VDD(IO) 13 20 IREF CLK (500 kHz) VDD
ADC
7 FB1
TEMPERATURE SENSOR
PWM channel 1
PWM1 14 PWM2 15 PWM3 16
3 PGND12
UBA3077HN
001aan130
Only channel 1 is shown.
Fig 1.
UBA3077HN
UBA3077HN block diagram
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
4 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
7. Pinning information
7.1 Pinning
40 PGND21 35 PGND22 31 PGND31 30 NC6 29 LX3 28 PGND32 27 FB3 26 SAD1 25 NC5 24 NC4 23 SAD0 22 SCL 21 SDA PGND11 11 VOUT1 12 VDD(IO) 13 PWM1 14 PWM2 15 PWM3 16 SGND 17 VDD 18 VIN 19 IREF 20
001aan132
36 HICCUP
39 VOUT2
terminal 1 index area NC1 LX2 PGND12 VSYNC GND INT FB1 NC2 LX1 1 2 3 4 5 6 7 8 9
UBA3077HN
NC3 10
Transparent top view
Fig 2.
Pin configuration (HVQFN40)
7.2 Pin description
Table 3. Symbol NC1 LX2 PGND12 VSYNC GND INT FB1 NC2 LX1 NC3 PGND11 VOUT1 VDD(IO) PWM1
UBA3077HN
Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Type power supply input input output power power supply power supply input Reset state H Description not connected (leave unconnected) channel 2 boost converter switch output channel 1 LED current source ground PWM duty cycle value update signal in I2C-bus mode connect to the global ground interrupt signal to the host (open-drain) channel 1 LED current source output not connected (leave unconnected) channel 1 boost converter switch output not connected (leave unconnected) channel 1 boost converter switch ground channel 1 boost converter output voltage reference and supply voltage for the host interface signals (from 1.8 V to 5 V) channel 1 PWM input signal
(c) NXP B.V. 2011. All rights reserved.
All information provided in this document is subject to legal disclaimers.
Objective data sheet
Rev. 1 -- 8 February 2011
32 VOUT3
38 NC9
34 NC8
33 NC7
37 FB2
5 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Pin description ...continued Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Type input input supply supply supply output input/output input input input power supply power supply power supply output power power supply Reset state H H Description channel 2 PWM input signal channel 3 PWM input signal ground of low power circuitry 5 V supply voltage power supply voltage connection for an external precision resistor defining the current in the LED channels I2C-bus serial data input/output (open-drain) I2C-bus serial clock input I2C-bus slave address selection 0 not connected (leave unconnected) not connected (leave unconnected) I2C-bus slave address selection 1 channel 3 LED current source output channel 3 LED current source ground channel 3 boost converter switch output not connected (leave unconnected) channel 3 boost converter switch ground channel 3 boost converter output voltage not connected (leave unconnected) not connected (leave unconnected) channel 2 LED current source ground connection for an external capacitor determining the delay for automatic fault recovery channel 2 LED current source output not connected (leave unconnected) channel 2 boost converter output voltage channel 2 boost converter switch ground
Table 3. Symbol PWM2 PWM3 SGND VDD VIN IREF SDA SCL SAD0 NC4 NC5 SAD1 FB3 PGND32 LX3 NC6 PGND31 VOUT3 NC7 NC8 PGND22 HICCUP FB2 NC9 VOUT2 PGND21
8. Functional description
8.1 Supply
The UBA3077HN high voltage circuitry requires a nominal supply voltage of 24 V on pin VIN. The allowed voltage range is 10 V to 42 V. The UBA3077HN low voltage circuitry requires a supply voltage of 5 V on pin VDD. Pins VDD and VIN have a built-in POR function. The POR threshold (falling edge) and hysteresis is respectively 3.8 V and 200 mV on pins VDD and VIN.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
6 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
If POR occurs on pin VIN, the band gap and all internal references are shutdown. This inhibits Active mode, however the register content is preserved while VDD is above the VDD POR threshold. The digital circuitry is reset and all register content cleared to default values only if a VDD POR occurs. The system interface signals (PWM1, PWM2 and PWM3) are referenced to VDD(IO) delivered by the system. VDD(IO) is typically in the range 1.8 V to 5 V.
8.2 I2C-bus protocol
The UBA3077HN features a slave mode I2C-bus interface. The I2C-bus interface is a 2-wire serial interface developed by NXP Semiconductors to communicate between different ICs or modules. The I2C-bus interface comprises an SDA line and an SCL line. Both lines must be connected to VDD via a pull-up resistor when connected to the output stages of a device. Data transfer may only be initiated when the bus is not busy. The UBA3077HN I2C-bus characteristic is in accordance with the 400 kbit/s Fast-mode I2C-bus specification. Remark: Details of the I2C-bus standard are available in document UM10204, "I2C-bus specification and user manual", version 0.3, June 2007, which can be downloaded from the NXP Semiconductors web site www.nxp.com.
8.2.1 I2C-bus protocols for UBA3077HN read and write sequences
The read sequence may use a repeated start condition during the sequence to avoid the bus being released during the communication. The sequences can be used to read or write either a single data byte or a sequence of data bytes. Sequences for write and read for both single bytes and burst mode are shown respectively in Figure 3 and Figure 4.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
7 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
single byte write sequence
S
SLAVE ADDRESS
W
A
SUB-ADDRESS n
A
nth REGISTER
A
P
burst mode write sequence
S
SLAVE ADDRESS
W
A
SUB-ADDRESS n
A
nth REGISTER FROM MASTER TO SLAVE
A
FROM SLAVE TO MASTER
(n+1)th REGISTER
A
P
S = start condition P = stop A = acknowledge N = not acknowledged
001aan133
Fig 3.
I2C-bus write sequence
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
8 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
single byte read sequence
S
SLAVE ADDRESS
W
A
SUB-ADDRESS n
A
Sr
SLAVE ADDRESS
R
A
nth REGISTER
N
P
burst mode read sequence
S
SLAVE ADDRESS
W
A
SUB-ADDRESS n
A
Sr
SLAVE ADDRESS
R
A
nth REGISTER
N
FROM MASTER TO SLAVE
(n+1)th REGISTER
N
P
FROM SLAVE TO MASTER
S = start condition P = stop A = acknowledge N = not acknowledged Sr = start repeat
001aan134
Fig 4.
I2C-bus read sequence
8.2.2 Addressing
Each UBA3077HN in an I2C-bus system is activated when it receives a valid address. The address must always be sent as the first byte after the start condition in the I2C-bus protocol. Up to four UBA3077HNs can be controlled by the same I2C-bus using pins SAD0 and SAD1 which define the two LSBs of the address.
Table 4. Address A6 0 A5 1 A4 1 A3 0 A2 0 A1 SAD1 A0 SAD0 R/W 1/0 I2C-bus address
One 7-bit address byte is required. The last bit of the address byte is the read/write bit and must always be set according to the required operation. The 7-bit I2C-bus address can be either: 0110000b (30h), 0110001b (31h), 0110010b (32h), or 0110011b (33h). The 7-bit address plus the R/W bit create an 8-bit write address of either 60h, 62h, 64h or 66h and a read address of either 61h, 63h, 65h or 67h. The second byte sent to the UBA3077HN is the subaddress of a specific register. All UBA3077HNs connected to the I2C-bus in the application acknowledge address 68h. This feature allows the PWM duty cycle of all channels to be changed simultaneously.
UBA3077HN All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
9 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
8.2.3 Data
The data byte(s) are sent after the subaddress is sent. The data byte(s) are defined in Figure 3 and Figure 4. An acknowledge is given after each data byte, and the subaddress automatically increments to the next, allowing burst mode in both read and write operation. A description of the data that can be programmed in the registers is given in the register map in Section 8.2.4.
8.2.4 Register map
The UBA3077HN has 7 user-accessible registers.
Table 5. Register descriptions Bit Symbol Access Value at reset R/W R/W 0000 0000 00 0000 1 0 0 1 1 1 0 0 0 0 0 0 0 0 000 10000000 Description 8 MSB of the 14-bit PWM duty cycle 6 LSB of the 14-bit PWM duty cycle deactivates adaptive thermal protection if set to 0 0: no phase shift PWM 1: 120 phase shift PWM 4 3 2 1 0 03h Status 7 6 5 4 3 2 1 0 04h Thermal RESERVED ILED_SLOPE STR3_EN STR2_EN STR1_EN OCP SHORTP3 SHORTP2 SHORTP1 OVP3 OVP2 OVP1 THERMP R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R/W 0: 250 ns (10 % to 90 %) 1: 500 ns (10 % to 90 %) string 3 enabled string 2 enabled string 1 enabled overcurrent status (write 1 to clear) channel 3 LED short status (write 1 to clear) channel 2 LED short status (write 1 to clear) channel 1 LED short status (write 1 to clear) channel 3 overvoltage status (write 1 to clear) channel 2 overvoltage status (write 1 to clear) channel 1 overvoltage status (write 1 to clear) OTP status (write 1 to clear) ID value: 01000 120 + (TSENSOR[2:0]) x 4 Tj < 120 + (TSENSOR[2:0] + 1) x 4 PWM PLL LSB division code
Address Register 00h 01h 02h PWM MSB PWM LSB Control
7 to 0 PWM[13:6] 7 to 6 RESERVED 5 to 0 PWM[5:0] 7 6 5
ADAPT_THERMP R/W RESERVED PWM_SHIFT R/W
7 to 3 Chip ID 2 to 0 TSENSOR[2:0]
05h
Fractional clock division
7 to 0 PLLLSB[7:0]
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
10 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Table 5.
Register descriptions Bit 7 6 Symbol VSYNCPOL PWMSEL Access Value at reset R/W R/W 0 0 Description 0: VSYNC signal active HIGH 1: VSYNC signal active LOW 0: external PWM selected (direct control mode) 1: I2C-bus PWM selected 5 VSYNC_EN R/W 0 0: immediate PWM duty cycle value change 1: PWM duty cycle value change on VSYNC signal state as defined by VSYNCPOL 4 RESERVED R/W 0010 PWM PLL MSB division code 3 to 0 PLLMSB[3:0]
Address Register 06h Clock division
8.3 State diagram
The UBA3077HN has the following modes:
* * * * *
Reset Sleep Active Adaptive thermal Hiccup
8.4 Reset mode
The chip enters the reset state at power start-up phase or as soon as VDD falls below the VDD POR threshold voltage (VPOR). All registers are cleared to their default value. If VDD is below the rising edge threshold voltage, the UBA3077HN remains in Reset mode.
8.5 Sleep mode
If all PWM input signals or internally generated PWM signals based on register settings stay LOW for more than 1 s, the circuit enters Sleep mode. In this mode, the boost converters are off and the chip activity is reduced to decrease the current consumption to less than 2.8 mA. When one of the PWM signals re-activates, the UBA3077HN enters Active mode provided that a protection has not been triggered.
8.6 Active mode
This is the normal operating mode where all supply conditions are correct and no abnormal event detected. In Active mode, the I2C-bus interface and all registers are fully accessible. DC-to-DC boost converter and LED current sources are operational and react to PWM signals as requested.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
11 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
All protection circuits are on and continuously monitor for abnormal events.
8.7 Adaptive thermal mode
In Active mode, whenever the die temperature exceeds 120 C, the chip can automatically enter Adaptive thermal mode. This mode can be disabled via the I2C-bus interface. At each 4 C step increase in junction temperature above 120 C, the peak LED current is reduced by 3 % independently of the duty cycle. This avoids having to deactivate the backlight suddenly if required, for example if the die overheats. The die temperature can be read via the I2C-bus. When the temperature falls below 120 C, the chip reverts to Active mode.
8.8 Hiccup mode
When a fault is detected, the appropriate protection is triggered; see Section 8.12. The fault is indicated by pin INT pulled LOW and the protection status register set accordingly. In response, a constant current source starts charging the external Hiccup capacitor. The protection is maintained until the voltage on pin HICCUP reaches VDD - 0.7 V. This duration is determined by a fixed 300 s per 1 nF of the hiccup capacitor value at a VDD of 5 V. A fixed recovery time of 200 s is added after all faults have disappeared, for re-calibration in case an OverTemperature Proctection (OTP) or OCP event has occurred. If the error is still present after the hiccup period, the hiccup restarts. If the error is removed, the INT line is cleared and the chip reverts to normal operation. The protection status register content is not automatically cleared. The external controller can force the protection status to be cleared at any time via the I2C-bus interface. This is done by writing FFh into the protection status register at address 03h.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
12 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Reset mode
POR = L all PWM = L for t > tsleep
or UVLO = H
POR = H
Sleep mode
any PWM = H and UVLO = L T < 120 C POR = H Active mode Hiccup = 5 V T > 120 C POR = H OCP = H or OVP = H or SHORTP < n > = H Adaptive thermal mode T > 150 C or OCP = H or OVP = H or SHORTP < n > = H
POR = H
Hiccup mode
001aan135
Fig 5.
State diagram
8.9 Boost converter
The boost converter is designed to handle a boost ratio from 1 to 4 with an input voltage from 10 V to 42 V (24 V nominal). The maximum output voltage is 75 V which is suitable for a string of up to 20 LEDs. The UBA3077HN embeds a 0.6 on-resistance MOSFET switch. It operates with a 500 kHz fixed switching frequency derived from an internal oscillator. An embedded slope compensation module ensures stability in Continuous Conduction Mode (CCM). The LED string is supplied by a low-side current source with PWM dimming. A feedback loop monitors the voltage at the output of the current source and controls the DC-to-DC output voltage VOUT. This loop ensures a minimum voltage headroom of 800 mV for the current source. The UBA3077HN is specifically designed for operating with an output capacitor value of 2 F. This allows audio noise to be removed by a high quality capacitor.
8.10 PWM control
8.10.1 Direct control
After a POR, the UBA3077HN is ready to work in direct control mode by default, accepting PWM signals on pins PWM1, PWM2 and PWM3 and amplifying them to the corresponding channels. The UBA3077HN supports a PWM frequency up to 24 kHz.
UBA3077HN All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
13 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
In direct control mode (bit PWMSEL set to logic 0), if control register 02h bit PWM_SHIFT is set to logic 0, all three PWMn inputs directly control channels 1, 2 and 3 respectively in a transparent manner. If bit PWM_SHIFT is set to logic 1, only input PWM1 is considered and PWM2 and PWM3 are overridden internally. Channel 1 is then driven by the signal on pin PWM1 while channel 2 and channel 3 are driven by the signal on pin PWM1 phase-shifted by 120 and 240 respectively. An internal PLL, based on the internal CCO, is used to determine, on-the-fly, the PWM1 frequency and to execute the phase shift. 8.10.1.1 I2C-bus based control If bit PWMSEL is set to logic 1, the PWM dimming control signals are generated on-chip, overriding the signal on inputs PWM1, PWM2 and PWM3. The characteristics of these PWM control signals are set via the I2C-bus interface. The PWM frequency range is 2.0 kHz to 24 kHz and the control signal is common to all channels. The phase between channels is controllable using bit PWM_SHIFT. The PWM frequency is set with the following formula: fPWM = 32 MHz / (K x 210) K = PLLMSB[3:0] + 1 + PLLLSB[7:0] / 256, limited to 16 (maximum) The minimum PWM signal pulse-width is 1 % of the 24 kHz period: 417 ns. The PWM duty cycle changes according to the value of registers PWM MSB (address 00h) and PWM LSB (address 01h). The duty cycle changes either immediately if a value change occurs (VSYNC_EN bit set to logic 0) or is synchronized with the VSYNC input signal (VSYNC_EN bit set to logic 1). In the latter case, the change occurs when VSYNC signal is HIGH (bit VSYNCPOL set to logic 0) or is LOW (bit VSYNCPOL set to logic 1). By default, all three channels are driven by an identical PWM signal. The three internally generated PWM control signals to the three channels can be phase shifted equally by 120 by setting control register (address 02h) PWM_SHIFT bit to logic 1.
8.11 LED current sources
The LED current generation path is fully integrated. This helps minimize the BOM cost while still providing an LED current that has good accuracy (2 % maximum at 150 mA). The UBA3077HN provides an accurate 1 V voltage reference from which a current reference is derived using an external resistor RIREF. This reference is accurately copied and multiplied at a ratio of 400, resulting in an LED current equal to 400 / RIREF in each of the 3 channels. The DC-to-DC boost converter design, including heat dissipation capability, allows a maximum current of 150 mA per channel. The accuracy of the LED current decreases at lower LED current values. Current switching is implemented by an integrated PWM switch. To avoid problems with ringing due to parasitic inductance present on the LED string, the rise time is programmable to two possible values: 250 ns (default) and 500 ns. These values represent the LED current 10 % to 90 % transition time.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
14 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
8.12 Protection circuits
Several protection circuits are integrated to protect the device and the application against defects. If a defect is detected, the converters and LED current source switching are inhibited, and the interrupt line is immediately pulled LOW. The exact nature of the defect is stored in register 03h and accessible via the I2C-bus interface enabling the system to decide the correct action to take. The UBA3077HN's embedded protection circuits are: overvoltage/open LED string (OVP), DC-to-DC overload/LED string short to ground (SHORTP), overtemperature (OTP) and overcurrent (OCP). DC-to-DC and PWM deactivation occurs on channel n and bits SHORTPn or OVPn are set if a SHORTP or OVP event occurs on channel n. Whereas THERMP and OCP events act on all channels at the same time. Fault recovery operation is described at Section 8.8.
8.12.1 OVP (open LED string)
A dedicated OVP is implemented per channel. It monitors and signals if the output voltage (VOUT) exceeds the predefined limit (77 V typical). This protection is also triggered if the LED string is cut (open LED string). If this fault occurs, the status bit(s) OVP 1, 2 and/or 3 are set in the protection status register accordingly and both the related DC-to-DC converter and LED current source are stopped immediately.
8.12.2 LED string shorted to ground protection
A dedicated LED string shorted to ground protection is implemented per channel. If this fault occurs, the voltage at pin FB of the faulty channel remains below 0.9 V whereas a current continues to flow through the LED string. To compensate, the DC-to-DC converters try to transfer as much energy as possible leading to the peak coil current exceeding the maximum limit (coil saturation current). This triggers the protection. If this fault occurs, the status bit(s) SHORTP 1, 2 and/or 3 are set in the protection status register accordingly and both the related DC-to-DC converter and LED current source are stopped immediately.
8.12.3 OverTemperature Protection (OTP)
In normal operation, at an ambient temperature up to 80 C, the die temperature must not exceed 120 C. Above 120 C, UBA3077HN features an adaptive temperature protection. Internally, the chip senses the junction temperature of the die. When higher than 120 C, the actual junction temperature is stored in Thermal register 04h bits TSENSOR[2:0] and the adaptive thermal protection is triggered (default configuration). This thermal information can be read by the application via the I2C-bus. Figure 6 shows if the adaptive thermal protection is active, the peak LED current is progressively decreased in 3 % steps at each 4 C increase in temperature above 120 C.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
15 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
If the chip temperature exceeds 150 C, the chip enters the Hiccup mode, all DC-to-DC converters and LED current sources are disabled and the THERMP flag is set in the 03h status register. Normal operation resumes only when the chip temperature is below 120 C.
LED current
100 % (150 mA)
(1)
79 % (120 mA)
120
150
Temperature (C)
001aan136
(1) At each 4 C step increase in temperature the LED current is reduced by 3 %.
Fig 6.
Adaptive thermal protection
8.12.4 OCP
This protection is triggered if the reference current IREF is too high making the peak LED current exceed 650 mA (15 % accuracy). If this protection is triggered, the OCP flag is set in the 03h Status register and all boost converters and current sources are disabled. This occurs typically if the value of RIREF is too low.
8.12.5 UVLO
If the voltage on pin VIN (VDD(24V)) falls below the UVLO threshold level (UVLO), the device stops operating. Normal operation resumes only when VDD(24V) is above the rising UVLO threshold. All register settings are maintained while VDD(5V) is above the POR falling threshold level. This protection does not generate an interrupt on the INT line and is not flagged in the Status register.
8.12.6 POR
A voltage supervisor constantly monitors the supplies to pins VDD and VIN. If the voltage on pin VDD and/or pin VIN voltage falls below the falling POR threshold level, the chip enters the reset state and cannot operate or be configured. All register values are then set to their default value. The chip can be programmed again when the voltage on pin VDD and/or pin VIN is above the POR rising threshold value.
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
16 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
8.12.7 Peak current limit
To avoid inductor saturation, the device is equipped with a peak current limit function which limits the peak inductor current to 2.5 A. If this occurs, a short-circuit protection is triggered and bit SHORTP of the faulty channel is set to logic 1 in the 03h Status register.
8.12.8 Interrupt line
Interrupt pin INT is an active LOW open-drain output. Multiple devices can be connected as a wired OR using the same interrupt line to the external control logic. On the interrupt line, only one pull-up resistor is required in the complete system.
9. Limiting values
Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).Voltages referenced to GND. Symbol VDD(24V) VDD(5V) VDD(IO) VIH Parameter supply voltage (24 V) supply voltage (5 V) input/output supply voltage HIGH-level input voltage PWM1, PWM2, PWM3, SCL, SDA, SAD0, SAD1 LX1, LX2, LX3, VOUT1, VOUT2, VOUT3, FB1, FB2, FB3 VGND ground supply voltage SGND, PGND11, PGND12, PGND13, PGND21, PGND22, PGND23 continuous; Tamb = 80 C, forced convection Conditions Min -0.5 -0.5 -0.5 -0.5 Max +45 +6 +6 +6 Unit V V V V
-0.5
+85
V
-0.5
+0.5
V
Ptot
total power dissipation
-
2.2
W
Tj Tstg VESD
junction temperature storage temperature electrostatic discharge voltage Human Body Model (HBM); all pins Machine Model (MM); all pins filed charged device model (FCDM); all pins
-40 -40 -2 -100 -500
+150 +150 +2 +100 +500
C C kV V V
10. Thermal characteristics
Table 7. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions
[1]
Typ
Unit K/W
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
17 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
[1]
The junction to ambient thermal resistance is dependent on the board layout, PCB material application, and environmental conditions.
11. Characteristics
Table 8. Characteristics VIN = 24 V; VDD = 5 V; VDD(IO) = 5 V; Tamb = 0 C to 80 C, unless otherwise specified. Symbol VDD(24V) VDD(5V) VDD(IO) VUVLO VPOR Vhys Parameter supply voltage (24 V) supply voltage (5 V) undervoltage lockout voltage power-on reset voltage hysteresis voltage Conditions pin VIN pin VDD with IDD(5V) < 35 mA VDD(24V) falling edge VDD(24V) rising edge VDD(5V) falling edge VDD(5V) rising edge for UVLO on VDD(24V) rising edge Min 10 4.5 1.62 7.8 8.35 2.4 2.6 550 Typ 24 5 8.3 8.9 3.6 3.7 600 100 100 2 21 Max 42 5.5 5.5 8.7 9.35 4.3 4.5 650 200 2.8 Unit V V V V V V V mV mV A mA mA General voltage levels
input/output supply voltage pin VDD(IO) with IDD(IO) < 1 mA
for POR on VDD(5V) rising edge 50 General current levels IDD(24V) IDD(5V) supply current (24 V) supply current (5 V) Sleep mode; internal CCO on Active mode; internal CCO on; 150 mA ILED; 100 % PWM duty cycle; all 3 channels active IDD(IO) Ileak(LX) Pin IREF Vref(IREF) Rext(IREF) Pin HICCUP VHICCUP IHICCUP VO NVBR VFB ILED voltage on pin HICCUP current on pin HICCUP output voltage voltage boost ratio voltage on pin FB LED current PWM on; static with 100 % PWM duty cycle pin FB; RIREF = 2267 ; RIREF accuracy = 0.1 %; PWMn = HIGH PWMn = LOW; VFBn = 75 V; leakage current
UBA3077HN
input/output supply current leakage current on pin LX reference voltage on pin IREF external resistor on pin IREF
24 kHz PWM Sleep mode pin IREF
0.98 2667
1.00 -
100 10 1.02 -
A A V
0 9.5 pins VOUT1, VOUT2 and VOUT3 VDD(24V) 1 147
13 0.9 150
VDD(5V) 16.5 75 4 1.2 153
V A V V mA
High power LED parameters (for the 3 channels)
-
-
5
A
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
18 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Table 8. Characteristics ...continued VIN = 24 V; VDD = 5 V; VDD(IO) = 5 V; Tamb = 0 C to 80 C, unless otherwise specified. Symbol tr(I)LED Parameter LED current rise time Conditions bit ILED_SLOPE = 0; 10 % to 90 % of ILED bit ILED_SLOPE = 1; 10 % to 90 % of ILED tf(I)LED PWM signals fPWM PWM tw(PWM)H PWM td(sleep) PWM frequency PWM duty cycle HIGH level PWM pulse width PWM phase shift sleep mode delay time internal PWM generator; external PWM signal internal PWM generator; external PWM signal internal PWM generator; external PWM signal internal PWM generator; CLK_SEL[1:0] = 01 pins PWM1, PWM2, PWM3 inactive (LOW) 2.0 0.1 417 100 1 120 24 100 140 3.5 kHz % ns deg s LED current fall time Min 200 400 Typ 250 500 300 Max 300 600 Unit ns ns ns
Power MOSFETs RDSon Timing fsw max I2C-bus VIL VIH VOL fSCL VIL VIH VIL VIH VOL IIH Ith(ocp) Vth(ovp) switching frequency maximum duty cycle interface LOW-level input voltage HIGH-level input voltage LOW-level output voltage SCL clock frequency LOW-level input voltage HIGH-level input voltage LOW-level input voltage HIGH-level input voltage LOW-level output voltage HIGH-level input current overcurrent protection threshold current overvoltage protection threshold voltage pin IREF pins VOUT1, VOUT2, VOUT3 Isink = 3 mA Isink = 3 mA 2 0 0 0.7VDD(IO) 0 0.7VDD(5V) 0 0 1.35 75 1.65 77 0.5 VDD(5V) 0.3 400 0.3VDD(IO) VDD(IO) 0.5 VDD(5V) 0.3 0.5 1.85 85 V V V kHz V V V V V A mA V DC-to-DC DC-to-DC 400 500 600 80 kHz % drain-source on-state resistance 0.5 1
Digital levels: pins VSYNC, PWM1, PWM2 and PWM3
Digital levels: pins SAD0 and SAD1
Digital levels: pin INT
Protection and limitations
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
19 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
Table 8. Characteristics ...continued VIN = 24 V; VDD = 5 V; VDD(IO) = 5 V; Tamb = 0 C to 80 C, unless otherwise specified. Symbol Ilim(L)M Tamb Tth(otp) Parameter peak inductor current limit ambient temperature Conditions on pin LXn operating Min 2 0 Typ 2.5 150 Max 3 80 Unit A C C
overtemperature protection die junction temperature threshold temperature
12. Application information
22 H 2 F
22 H
VIN = 24 V
22 H
2 F
VIN VDD = 5 V VDD 19 18 9
LX1 2
LX2
LX3 29
2 F
SDA SCL SAD0 SAD1 VDD(IO) VDD(IO)
12 21 39 22 32 23 26 13 11
VOUT1 VOUT2 VOUT3
PGND11 PGND21 PGND31
UBA3077HN
40 INT VSYNC PWM1 PWM2 PWM3 HICCUP IREF 6 4 14 15 16 36 20 17 SGND 3 PGND12 35 PGND22 28 7 37 27 31
FB1 FB2 FB3
PGND32
001aan131
Refer to the application notes for PCB design recommendations.
Fig 7.
Typical application diagram
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
20 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
13. Package outline
HVQFN40: plastic thermal enhanced very thin quad flat package; no leads; 40 terminals; body 6 x 6 x 0.85 mm
SOT618-1
D
B
A
terminal 1 index area E A A1
c
detail X
e1 e 11 L 10 21 e
1/2
C e b 20 vMCAB wMC y1 C y
Eh
1/2
e2 e
1 terminal 1 index area
30 40 Dh 0 2.5 scale E(1) 6.1 5.9 Eh 4.25 3.95 e 0.5 e1 4.5 e2 4.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 5 mm 31 X
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D(1) 6.1 5.9 Dh 4.25 3.95
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT618-1 REFERENCES IEC --JEDEC MO-220 JEITA --EUROPEAN PROJECTION ISSUE DATE 01-08-08 02-10-22
Fig 8.
UBA3077HN
Package outline SOT618-1 (HVQFN40)
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
21 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
14. Abbreviations
Table 9. Acronym BOM CCO LSB MSB PCB PLL POR PWM Abbreviations Description Bill Of Materials Current Controlled Oscillator Least Significant Bit Most Significant Bit Printed-Circuit Board Phase Locked Loop Power-On-Reset Pulse-Width Modulated or Pulse-Width Modulator
15. Revision history
Table 10. Revision history Release date 20110208 Data sheet status Objective data sheet Change notice Supersedes Document ID UBA3077HN v.1
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
22 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
(c) NXP B.V. 2011. All rights reserved.
16.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or
UBA3077HN
All information provided in this document is subject to legal disclaimers.
Objective data sheet
Rev. 1 -- 8 February 2011
23 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications.
Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b)
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of NXP B.V.
17. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
UBA3077HN
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 8 February 2011
24 of 25
NXP Semiconductors
UBA3077HN
Three-channel switched-mode LED driver
18. Contents
1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.2.1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . 7 I2C-bus protocols for UBA3077HN read and write sequences. . . . . . . . . . . . . . . . . . . . . 7 8.2.2 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.2.3 Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.2.4 Register map . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.3 State diagram . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.4 Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.5 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.6 Active mode . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.7 Adaptive thermal mode. . . . . . . . . . . . . . . . . . 12 8.8 Hiccup mode. . . . . . . . . . . . . . . . . . . . . . . . . . 12 8.9 Boost converter . . . . . . . . . . . . . . . . . . . . . . . 13 8.10 PWM control . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8.10.1 Direct control . . . . . . . . . . . . . . . . . . . . . . . . . 13 8.10.1.1 I2C-bus based control . . . . . . . . . . . . . . . . . . . 14 8.11 LED current sources . . . . . . . . . . . . . . . . . . . . 14 8.12 Protection circuits . . . . . . . . . . . . . . . . . . . . . . 15 8.12.1 OVP (open LED string) . . . . . . . . . . . . . . . . . . 15 8.12.2 LED string shorted to ground protection . . . . . 15 8.12.3 OverTemperature Protection (OTP) . . . . . . . . 15 8.12.4 OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.12.5 UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.12.6 POR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.12.7 Peak current limit . . . . . . . . . . . . . . . . . . . . . . 17 8.12.8 Interrupt line . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17 10 Thermal characteristics . . . . . . . . . . . . . . . . . 17 11 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 18 12 Application information. . . . . . . . . . . . . . . . . . 20 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 21 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 16.1 16.2 16.3 16.4 17 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 23 23 24 24 25
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 8 February 2011 Document identifier: UBA3077HN

▲Up To Search▲

Price & Availability of UBA3077HN

	To Download UBA3077HN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .